Theora Hardware: Difference between revisions
Jump to navigation
Jump to search
Portavales (talk | contribs) No edit summary |
Portavales (talk | contribs) No edit summary |
||
Line 9: | Line 9: | ||
The complete text of the project proposed is here: | The complete text of the project proposed is here: | ||
* [http://atlas.lsc.ic.unicamp.br/%7Eportavales/wp-content/uploads/2006/05/soc_proposal.txt SOC - Theora Hardware Decoding] | |||
As soon as possible, there will be more specific information about the implementation, but to begin, there is two presentations that the author of the SOC proposal presented in his University: | As soon as possible, there will be more specific information about the implementation, but to begin, there is two presentations that the author of the SOC proposal presented in his University: | ||
* [http://atlas.lsc.ic.unicamp.br/%7Eportavales/wp-content/uploads/2006/05/hard_theora.pdf Theora Hardware Decoding] | |||
* [http://atlas.lsc.ic.unicamp.br/%7Eportavales/wp-content/uploads/2006/05/video_enc_basic.pdf Video Encoding: Basic Principles] |
Revision as of 16:01, 28 May 2006
Currently Theora decoding is not provided by any hardware. The Elphel 333 can encode a theora stream though.
But, there is an accepted proposal to Summer Of Code 2006 that the goal is to do a Hardware Implementation of the Theora Decoding Algorithm.
The intent is to get a FPGA embeded system decoding Theora Streams in real-time.
The complete text of the project proposed is here:
As soon as possible, there will be more specific information about the implementation, but to begin, there is two presentations that the author of the SOC proposal presented in his University: