Difference between revisions of "Theora Hardware"

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* [http://svn.xiph.org/trunk/theora-fpga/ Current Theora Hardware VHDL source]
 
* [http://svn.xiph.org/trunk/theora-fpga/ Current Theora Hardware VHDL source]
 
* [http://www.gaisler.com/leonmain.html LEON resouces]
 
* [http://www.gaisler.com/leonmain.html LEON resouces]
* [http://www.students.ic.unicamp.br/~ra031198/leon3.JPG LEON arrchitecture]
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* [http://www.students.ic.unicamp.br/~ra031198/leon3.JPG LEON architecture]
  
  

Revision as of 21:00, 12 May 2007

The Elphel 333 can encode a Theora stream.

Decoder

Currently there is a hardware decoder implementation being developed. The Google "Summer Of Code 2006" (author's university projects page) began to produce an FPGA decoder implementation in VHDL and now there is another "Summer Of Code 2007" project (description) to work on it together with another independent developer.

Here are two presentations that the author of the SOC 2006 proposal presented in his University:


Architecture and current state of development


http://www.students.ic.unicamp.br/~ra023772/images/theora_integration_with_LEON.png


Developers

  • Felipe Portavales Goldstein (portavales at gmail) - Website
  • Leonardo Piga (leonardo.piga at gmail)
  • Andre Costa


See also