Theora Hardware: Difference between revisions

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The [http://www.xilinx.com/publications/xcellonline/xcell_53/xc_video53.htm Elphel 333] can encode a Theora stream.
The [http://www.xilinx.com/publications/xcellonline/xcell_53/xc_video53.htm Elphel 333] can encode a Theora stream.


Hardware decoders for Theora are just beginning to appear. The Google "Summer Of Code 2006" produced an FPGA decoder implementation in Verilog.
= Decoder =
* [http://svn.xiph.org/trunk/theora-fpga/ Verilog source]
Currently there is a hardware decoder implementation being developed.
* [http://www.students.ic.unicamp.br/~ra023772/projects.html Author's University projects page]
The Google "Summer Of Code 2006" ([http://www.students.ic.unicamp.br/~ra023772/projects.html author's university projects page]) began to produce an FPGA decoder implementation in VHDL and now there is another "Summer Of Code 2007" project ([http://code.google.com/soc/xiph/appinfo.html?csaid=4235040C184DBD68 description]) to work on it together with another independent developer.


Here are two presentations that the author of the SOC proposal presented in his University:
Here are two presentations that the author of the SOC 2006 proposal presented in his University:
* [http://svn.xiph.org/trunk/theora-fpga/doc/hard_theora.pdf Theora Hardware Decoding]
* The first idea of implementation is shown on this presentation:[http://svn.xiph.org/trunk/theora-fpga/doc/hard_theora.pdf Theora Hardware Decoding]
* [http://svn.xiph.org/trunk/theora-fpga/doc/video_enc_basic.pdf Video Encoding: Basic Principles]
* [http://svn.xiph.org/trunk/theora-fpga/doc/video_enc_basic.pdf Video Encoding: Basic Principles]
== Architecture and current state of development ==
* [http://svn.xiph.org/trunk/theora-fpga/ VHDL source]
== Developers ==
* Felipe Portavales Goldstein (portavales at gmail) - [http://www.students.ic.unicamp.br/~ra023772/ Website]
* Leonardo Piga
* Andre Costa


== See also ==  
== See also ==  
{{Template:Theora}}
{{Template:Theora}}
* [[VorbisHardware]]
* [[VorbisHardware]]

Revision as of 18:44, 12 May 2007

The Elphel 333 can encode a Theora stream.

Decoder

Currently there is a hardware decoder implementation being developed. The Google "Summer Of Code 2006" (author's university projects page) began to produce an FPGA decoder implementation in VHDL and now there is another "Summer Of Code 2007" project (description) to work on it together with another independent developer.

Here are two presentations that the author of the SOC 2006 proposal presented in his University:


Architecture and current state of development


Developers

  • Felipe Portavales Goldstein (portavales at gmail) - Website
  • Leonardo Piga
  • Andre Costa



See also